1. Field of the Invention
The invention relates to Universal Serial Bus (USB) systems, and in particular to a USB peripheral device and a method of determining a speed mode therein.
2. Description of the Related Art
USB (Universal Serial Bus) connectivity supports hardware peripherals, such as keyboard, mouse, scanner, printer . . . etc. USB 1.0, USB 1.1, and USB 2.0 standards specify three speed modes. USB 1.0 specifies a low speed mode, applicable to 1.5 Mbps data transmission, such as for keyboard and mouse. USB 1.1 defines full speed mode, capable of transmitting data up to 12 Mbps data rate. USB 2.0 specifies high speed mode, with data rate up to 480 Mbps. Each USB host is required to determine the correct speed mode thereof, such that data transmission can be carried out accordingly.
FIG. 1 is a block diagram of a USB system, comprising USB host 10, USB transmission bus 12, and USB peripheral device 14. USB host 10 is coupled to USB transmission bus 12, and then to USB peripheral device 14. USB host 10 comprises power supply 100 and host transceiver 102. USB transmission bus 12 comprises Vbus 120, Data+ line 122, Data− line 124, and GND 126. USB peripheral device 14 comprises power supply 140 and device transceiver 142.
Power supply 100 provides 5V power to host transceiver 102, implemented by hardware comprising a driver interface that receives instruction from a driver program and acts accordingly. Host transceiver 102 transmits signals compliant with USB standards to USB peripheral device 14. These signals generally are differential signal pair, transmitted through a twisted pair, i.e., Data+ line 122 and Data− line 124. Data+ and Data− signals on Data+ line 122 and Data− line 124 are half-duplex signals, i.e., the USB signal transmission is conducted by either USB host 10 or USB peripheral device 14 at one time, but not both simultaneously. Power supply 140 is a voltage regulator providing power for device transceiver 142, converting 5V from Vbus 120 to 3.3V. While FIG. 1 shows USB host 10 connected to a single USB peripheral device 14, multiple 14s may be connected to USB host 10 via branching structure.
FIGS. 2a and 2b show waveforms of Data+ and Data− signals compliant with USB standards for determining speed mode of a USB peripheral device, incorporating the USB system in FIG. 1, where the horizontal axis represents time, and the vertical axis represents detected voltages. Period Tconnect is connection timeDCNN in USB standards.
FIG. 2a depicts a waveform diagram of signals on Data+ line 122 and Data− line 124 for high/full speed or full speed mode. Curve 20a is a voltage signal on Data+ line 122 and curve 22a a voltage signal on Data− line 124. Host transceiver 102 detects curve 20a increasing at time 200a, reaching VIH at time 202a, while curve 22a remains at voltage VSS throughout. Host transceiver 102 continues monitoring both signals after time 202a, and, if curve 20a stays above VIH and curve 22a remains at VSS in period Tconnect, host transceiver 102 determines USB peripheral device 14 is either a high/full speed or a full speed USB peripheral device. Actual determination of whether its speed mode is high/full or full occurs only after USB peripheral device 14 receives a reset signal from host transceiver 102, based upon the following handshake between USB peripheral device 14 and host transceiver 102.
FIG. 2b depicts a waveform diagram of signals on Data+ line 122 and Data− line 124 for low speed mode. 20b is a voltage signal on Data+ line 122 and 22b a voltage signal on Data− line 124. Host transceiver 102 detects 22b increasing at time 200b, reaching VIH at time 202b, while 20b remains at voltage VSS throughout. Host transceiver 102 continues monitoring both signals after time 202a, if 22b stays above VIH and 20b remains at VSS in period Tconnect, host transceiver 102 determines USB peripheral device 14 is a low speed USB peripheral device. Period Tconnect is connection time DCNN in USB standards.
It can be understood from the description above that the conventional method has no problem in recognizing a low speed USB peripheral device. However, the conventional method does have difficulty in distinguishing a high/full speed device from a full speed device, or vice versa, for these two speed devices cause completely the same voltage-to-time curve before the sending or receiving of a reset signal. Before the determination of whether a USB peripheral device is a high/full speed device or a full speed device, the USB peripheral device will first experience a full speed mode, and, after receiving a reset signal from a host transceiver, enter a high speed mode to cause the host transceiver entering the same high speed mode for data communication. Nevertheless, the sending and the receiving of the reset signal happen 100 ms after time 204a. Thus, the conventional method to identify a high/full device from a high device is too late and renders the delay of data communication. Also is it too complex for it requires the following Data+ and Data− handshake between USB peripheral device 14 and host transceiver 102 to make such identification.
Thus a need exists for a USB peripheral device and method to efficiently and quickly determine a speed mode thereof.